Voltage mode boost converter using a period-fixed amplitude-modulated pulse control signal

ABSTRACT

A power converter includes a control signal generating circuit for generating a step-up control pulse signal with a fixed period and a modulated amplitude; a step-up circuit for adjusting an output voltage signal of the step-up circuit according to the step-up control pulse signal generated by the control signal generating circuit; and a feedback circuit, which is electrically connected to the control signal generating circuit and the step-up circuit, and which generates a feedback voltage signal according to the output voltage signal of the step-up circuit.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The invention relates to a voltage converter and, moreparticularly, to a DC-to-DC power converter.

[0003] 2. Description of the Related Art

[0004] The voltage required by common semiconductor components ormicroelectronic devices is mostly between 3.0V and 5.5V, while thevoltage source required by some devices may be larger; for example, thevoltage for driving an LCD driver, or the voltage for a flash memory,which is mostly between 6V and 7V. Therefore, most industrialmanufacturers provide a voltage converter to convert circuit voltage sothat a lower voltage (3.0V-5.5V) can be stepped up to a higher voltage(6V-7V) for use.

[0005] As shown in FIG. 1A, a conventional circuit configuration of avoltage converter 1 comprises a pulse-width modulation control circuit11, a step-up circuit 12 and a feedback circuit 13.

[0006] As for the voltage converter 1, when it converts voltage, it mustcoordinate with a triangle wave generator (not shown), which is used togenerate a triangle wave signal, and the triangle wave signal is inputto the pulse-width modulation control circuit 11 to proceed with thepulse-width modulation control.

[0007] The principle of the pulse-width modulation control is to use thefeedback voltage signal V_(FB), which is generated by the feedbackcircuit 13, and to use the triangle wave signal to adjust the waveformduty time. FIG. 1B is a diagram illustrating how to use the feedbackvoltage signal V_(FB) to adjust the waveform duty time, wherein V_(rp)and V_(rn) each represents a peak value of the amplitude of the trianglewave signal, and V_(FB1) and V_(FB2) each represents the feedbackvoltage signal at different times. As shown in FIG. 1B, when thefeedback voltage signal V_(FB) is at V_(FB1), its corresponding dutytime is T₁, and when the feedback voltage signal V_(FB) is at V_(FB2),its corresponding duty time is T₂. In brief, the above-mentionedpulse-width modulation control circuit 11, in accordance with thefeedback voltage signal V_(FB) and the triangle wave signal, cangenerate a pulse signal with an adjustable duty time, and the pulsesignal is a signal that appears at the point O shown in FIG. 1A, whilethe waveform of the signal that appears at the point O is shown in FIG.1B.

[0008] In addition, as shown in FIG. 1A, the step-up circuit 12 of thevoltage converter 1 comprises a MOS device as a switch, an inductordevice L for providing an electric charge, a diode device D forrectifying, and a capacitor device for storing an electric charge. Amongthese devices, the MOS device, the diode device, and the capacitordevice are connected to one another in series, and the inductor deviceis connected between the MOS device and the diode device in parallel.The signal (i.e., the signal that appears at the point O) output by thepulse-width modulation control circuit 11 is for controlling the gate ofthe MOS device so that the inductor device L can charge to the capacitordevice C.

[0009] Also, the feedback circuit 13 comprises a resistor R₁, a resistorR₂ and a feedback terminal 131. The resistor R₁ is connected to theresistor R₂ in series, and one end of the feedback terminal 131 iselectrically connected between the resistor R₁ and the resistor R₂,while the other end of the feedback terminal 131 is electricallyconnected to the pulse-width modulation control circuit 11. The feedbackcircuit 13 is used to generate a feedback voltage signal V_(FB) to thepulse-width modulation control circuit 11, and accordingly controls theoutput of the pulse-width modulation control circuit 11.

[0010] However, as for the voltage converter 1, it has a shortcomingthat when stepping up the voltage, it must rely on a triangle waveformgenerator to generate a triangle waveform signal; otherwise, the voltageconverter 1 cannot operate smoothly, which means that the trianglewaveform generator must keep on operating all the time. In other words,the voltage converter 1 cannot go into a standby mode.

[0011] As shown in FIG. 2A, another conventional voltage converter 2comprises a pulse-frequency modulation control circuit 21, a step-upcircuit 22 and a feedback circuit 23. As for the voltage converter 2,the circuit configuration and performance of its step-up circuit 22 andfeedback circuit 23 are the same as those of the above-mentionedconventional voltage converter 1. The difference between the converters1 and 2 is that the latter uses a pulse-frequency modulation controlcircuit 21 to generate control signals. The pulse-frequency modulationcontrol circuit 21 mainly utilizes the amplitude of the feedback voltagesignal V_(FB), which is output by the feedback circuit 23, to adjust theperiod of the control signal that appears at the point O. As shown inFIG. 2B, the larger the feedback voltage signal V_(FB) output by thefeedback circuit 23 is, the larger the period of the control signal thatappears at the point O will be.

[0012] However, as for the voltage converter 2, it has a shortcomingthat the voltage output by the voltage converter 2 is affected by thechange of amplitude of V_(cc) voltage, thereby causing poor qualityoutput voltage.

[0013] In view of the shortcomings of the conventional voltageconverters, to provide a power converter with a standby mode and goodquality output voltage becomes an important task.

SUMMARY OF THE INVENTION

[0014] The object of the invention is to provide a power converter,which has a standby mode and the feature of low standby current, and hasgood quality output voltage.

[0015] The feature of the invention is to provide a control signalgenerating circuit, which uses feedback voltage signal to generate astep-up control pulse signal that is period-fixed andamplitude-modulated, so that the power converter of the invention canhave a standby mode and a low standby current, and also ensure goodquality output voltage.

[0016] Thus, to achieve the above-mentioned objective, a power converterin accordance with the invention comprises a control signal generatingcircuit, which is used to generate a step-up control pulse signal thatis period-fixed and amplitude-modulated, a step-up circuit, whichadjusts the output voltage signal of the step-up circuit according tothe step-up control pulse signal generated by the control signalgenerating circuit, and a feedback circuit, which generates a feedbackvoltage signal according to the output voltage signal of the step-upcircuit. The feedback voltage signal is input into the control signalgenerating circuit, and the control signal generating circuit generatesthe step-up control pulse signal according to the feedback voltagesignal.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017]FIG. 1A is a diagram illustrating the circuit configuration of aconventional power converter;

[0018]FIG. 1B is a waveform schematic diagram illustrating therelationships among the feedback voltage signal V_(FB), the trianglewave signal, and the signal that appears at the point O, which are allin the circuit of FIG. 1A;

[0019]FIG. 2A is a diagram illustrating the circuit configuration ofanother conventional power converter;

[0020]FIG. 2B is a schematic diagram illustrating the signal waveform atthe point O shown in FIG. 2A;

[0021]FIG. 3 is a diagram illustrating the circuit configuration of apower converter in accordance with an embodiment of the invention;

[0022]FIG. 4 is a block diagram illustrating the structure of thecontrol signal generating circuit of a power converter according to theinvention;

[0023]FIG. 5 is a diagram illustrating the circuit configuration of theamplitude control circuit of the control signal generating circuit inaccordance with the invention;

[0024]FIG. 6 is a diagram illustrating the circuit configuration of themodulation circuit of the control signal generating circuit inaccordance with the invention; and

[0025]FIG. 7 is a schematic diagram illustrating the signal waveform atthe point O shown in FIG. 3.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] With reference to FIG. 3, a power converter in accordance with anembodiment of the invention comprises a control signal generatingcircuit 31, a step-up circuit 32 and a feedback circuit 33. The circuitconfiguration and performance of the step-up circuit 32 and the feedbackcircuit 33 in the embodiment are generally the same as that of theconventional voltage converter, so the description thereof is omittedhere. Additionally, the MOS device used in the embodiment is an NMOSdevice.

[0027] As shown in FIG. 4, the control signal generating circuit 31 ofthe power converter 3 in accordance with the invention is an amplitudecontrol circuit 311 and a modulation circuit 312. The amplitude controlcircuit 311 receives an external voltage signal V_(CC) and a referencevoltage signal V_(ref) from outside, and receives a feedback voltagesignal V_(FB) generated by the feedback circuit 33; then, in accordancewith the external voltage signal V_(CC), the reference voltage signalV_(ref) and the feedback voltage signal V_(FB), the amplitude controlcircuit 311 generates an amplitude control signal V_(D). The modulationcircuit 312 receives a timing pulse signal CLK from outside, andgenerates a step-up control pulse signal (i.e., the signal that appearsat the point O) according to the timing pulse signal CLK and theamplitude control signal V_(D). The waveform of the step-up controlpulse signal is shown in FIG. 7. It should be noted that as shown inFIG. 4, in addition to being used to generate a step-up control pulsesignal, the timing pulse signal CLK is simultaneously input into theamplitude control circuit 311, as a standby signal (hereinafter referredas PWDN) of the amplitude control circuit 311. To go into details, whenthe CLK is high, the amplitude control circuit 311 is in a standby mode;on the other hand, when the CLK is low, the amplitude control circuit311 is in an active mode.

[0028] The following further illustrates how the step-up control pulsesignal is generated, with reference to FIGS. 5 and 6.

[0029] As shown in FIG. 5, the amplitude control circuit 311 of theembodiment of the invention can be configured using two resistors andone comparator. It can be seen from FIG. 5 thatV_(D)=(R₂/R₁)(V_(ref1)−V_(FB))+V_(ref1). When the PWDN is high (i.e.,the CLK is high), the amplitude control signal V_(D) will be low; whenthe PWDN is turning from high to low, the amplitude of the amplitudecontrol signal V_(D) will change from 0 to V_(d), and at the same time,there will be a rising time for a few microseconds. On the other hand,when the PWDN is turning from low to high, the amplitude of theamplitude control signal V_(D) will change from V_(d) to 0, and therewill also be a falling time for a few microseconds. Since the amplitudecontrol circuit 311 has the above-mentioned features, the amplitudecontrol signal V_(D) that is output by the amplitude control circuit 311can then avoid generating a momentarily larger current to the NMOSdevice; then the feature of high quality voltage is obtained since thelarger current can cause a ground-bouncing phenomenon. Furthermore, asthe amplitude control circuit 311 changes from 0 to V_(d), it enablesthe power converter 3 of the invention to have the feature of lowstandby current.

[0030] Also, as shown in FIG. 5, sinceV_(D)=(R₂/R₁)(V_(ref1)−V_(FB))+V_(ref1), it can be seen that the largerthe V_(FB) is, the smaller the V_(D) will be. Further, when the V_(D)becomes smaller, the V_(D) needed to turn on the NMOS gate voltage(shown in FIG. 3) will become smaller, as shown in FIG. 7; consequently,the NMOS Ron resistor will be large. This particular feature makes itpossible when the V_(out) approaches the desired high voltage that theoutput ripple becomes smaller because the increase in the amount ofvoltage gets smaller each time; therefore, a high voltage of highquality can be obtained.

[0031] As shown in FIG. 6, the modulation circuit 32 includes an NMOSdevice, a PMOS device, a comparator, and a logic device. When the CLK ishigh, the output of point O is equivalent to the ground, whereas whenthe CLK is low, the output of point O is equal to V_(D).

[0032] In sum, the power converter 3 of the invention has a feature ofstandby mode because when it works, it does not have to coordinate withthe triangle wave generator. In addition, when the power converter 3 ofthe invention is turned on, the output of point O of the amplitudecontrol circuit 311 will change from 0 to V_(d); therefore, it has thefeature of low standby current.

[0033] Also, the specific embodiment described in the description of thepreferred embodiments is only intended to illustrate the technicalcontents of the invention; it does not, however, to limit the inventionto the specific embodiment described. Accordingly, various modificationsand changes can be made without departing from the spirit and scope ofthe invention as set forth in the appended claims.

What is claimed is:
 1. A power converter comprising: a control signalgenerating circuit for generating a step-up control pulse signal with afixed period and a modulated amplitude; a step-up circuit, which iselectrically connected to the control signal generating circuit, whichadjusts an output voltage signal of the step-up circuit according to thestep-up control pulse signal generated by the control signal generatingcircuit; and a feedback circuit, which is electrically connected to thecontrol signal generating circuit and the step-up circuit respectively,and which generates a feedback voltage signal according to the outputvoltage signal of the step-up circuit; the feedback voltage signal isinput into the control signal generating circuit, and the control signalgenerating circuit generates the step-up control pulse signal accordingto the feedback voltage signal.
 2. The power converter as claimed inclaim 1, wherein the control signal generating circuit includes anamplitude control circuit and a modulation circuit, in which theamplitude control circuit receives a voltage signal and a referencevoltage signal from outside, and receives the feedback voltage signalthat is generated by the feedback circuit, and then, in accordance withthe external voltage signal, the reference voltage signal and thefeedback voltage signal, the amplitude control circuit generates anamplitude control signal; the modulation circuit receives a timing pulsesignal from outside and generates the step-up control pulse signalaccording to the timing pulse signal and the amplitude control signal.3. The power converter as claimed in claim 1, wherein the step-upcircuit further comprises a MOS device, an inductor device, a diodedevice and a capacitor device, and among these devices, the MOS device,the diode device, and the capacitor device are connected to one anotherin series, while the inductor is connected between the MOS device andthe diode device in parallel; the gate of the MOS device is electricallyconnected to the control signal generating circuit.
 4. The powerconverter as claimed in claim 1, wherein the feedback circuit furthercomprises a first resistor, a second resistor and a feedback terminal;the first resistor is connected to the second resistor in series, andone end of the feedback terminal is electrically connected between thefirst resistor and the second resistor, while the other end of thefeedback terminal is electrically connected to the control signalgenerating circuit.
 5. The power converter as claimed in claim 3,wherein the MOS device is an NMOS device.